Senior SOC Design Engineer

Details

NVIDIA is hiring a Senior Design Engineer to design, analyze, and evolve next generation SoC solutions. We are looking for special individuals with passion and desire to deliver innovative products. Together, we will build the next generation of life changing SoC's. If you are a motivated individual that understands how SoC systems are architected and built, has intimate knowledge of client requirements, and understand various development cycles, this is your place to be.

Responsibilities

• Work in NVIDIA's semi-custom engineering team building customized chip solutions targeting data center/cloud, AI, self-driving, 5G, gaming, and consumer use cases.
• Collaborate with Architects, Chip Leads, and Customers on SOC IP design, development, timing closure, power analysis, methodology alignment, and program execution to ensure pre-silicon and post silicon targets are met.
• Integrate, evolve, and optimize IP blocks across a range of products. Ensure smooth integration of external and internal IPs.
• Contribute to cross-team RTL methodologies to achieve efficient design reuse.
• Evaluate microarchitectural options and collaborate with other design teams to achieve the right microarchitectural tradeoffs for the product.
• Understand connectivity protocols and standards and develop RTL structures to ensure correct connectivity. Build clock, power, and reset connection networks.
• Work with customers, partners, and IP vendors to understand IP solutions best suited for our target use cases and work with them to select and integrate appropriate IP solutions.

Requirements

• Master's Degree in Computer Engineering or Electrical Engineering (or equivalent experience).
• 7+ years of relevant work experience in RTL development focused on CPU, GPU, and HPC architectures.
• Proficiency in industry standard RTL development tools.
• Experience developing high speed digital blocks.
• Experience debugging complex high speed designs.
• Strong interpersonal, communication and teamwork skills.
• Good understanding and experience with SOC integration methods such as DFT/MBIST, CDC, Static LP checks, Synthesis etc.
• Experience interconnecting and analyzing innovative microarchitectural structures and subsystems.

Join the future of chip design, you will work on groundbreaking products with a dedicated team.