Senior R&D Software Engineer, VLSI Floorplanning and Optimization
at Nvidia
π Santa Clara, United States
USD 196,000-368,000 per year
SCRAPED
Used Tools & Technologies
Not specified
Required Skills & Competences ?
Software Development @ 4 R @ 4 C @ 4 C++ @ 4 Algorithms @ 4 Machine Learning @ 4 Communication @ 4Details
NVIDIA's team develops internal EDA tools by combining advances in parallel computing, machine learning, and novel algorithms in C++. This R&D Software Engineer role focuses on EDA strategies and algorithms for floorplanning, design estimation, and optimization. The work mixes graph-based algorithms, AI, and designer feedback to solve real VLSI problems and directly impact advanced AI hardware.
Responsibilities
- Invent and optimize new methods for floorplanning and chip-level optimization tools.
- Develop machine learning strategies to improve efficiency of design space exploration.
- Explore high-performance algorithms for block placement, datapath estimation, and early design estimation, including methods that efficiently incorporate human insight.
- Explore use of LLMs (Large Language Models), GNNs (Graph Neural Networks), GANs (Generative Adversarial Networks), and Reinforcement Learning for efficient EDA solutions.
- Own the full process from discovery and invention of new optimization opportunities through final deployment of solutions; define new projects and drive roadmap for hardware design productivity.
Requirements
- MS or PhD in Electrical Engineering or Computer Science or equivalent experience.
- 10+ years of EDA software and VLSI hardware design experience.
- Proven track record in software development with C++, particularly in algorithm development related to graphs, placement, optimization, analysis and visualization.
- Familiarity with EDA techniques including floorplanning, placement, routability, partitioning, static timing analysis, and SAT solvers.
Ways to stand out
- Experience with C++17 / C++14 features (lambdas, concurrency).
- Deep understanding of algorithm design principles: complexity analysis, multithreading, distributed computing, efficient memory and I/O use.
- Hands-on experience in chip-level floorplanning, timing estimation, and design optimization.
- Familiarity with machine learning techniques for analysis and optimization, and use of AI code generation tools.
- Good communication and interpersonal skills.
Compensation and benefits
- Base salary ranges (determined by location, experience, and comparable pay):
- Level 5: 196,000 USD - 310,500 USD
- Level 6: 232,000 USD - 368,000 USD
- You will also be eligible for equity and benefits. (Link provided in original posting.)
Additional information
- Location: Santa Clara, CA, United States.
- Employment type: Full time.
- Applications accepted at least until July 29, 2025.
- NVIDIA is an equal opportunity employer and is committed to fostering a diverse work environment.