Senior Staff Compiler Engineer

at Groq
USD 185,500-324,600 per year
SENIOR
✅ Remote

SCRAPED

Used Tools & Technologies

Not specified

Required Skills & Competences ?

TensorFlow @ 3 Leadership @ 4 Communication @ 7 Mentoring @ 4 PyTorch @ 3

Details

Groq delivers fast, efficient AI inference. Our LPU-based system powers GroqCloud™, giving businesses and developers the speed and scale they need. From our Bay Area roots to our growing global presence, we are on a mission to make high performance AI compute more accessible and affordable. When real-time AI is within reach, anything is possible. Build fast.

As a Senior Staff Compiler Engineer, you will be responsible for defining and developing compiler optimizations for our state-of-the-art compiler, targeting Groq's Language Processing Unit (LPU).

Responsibilities

  • Lead the design, development, and maintenance of Groq’s optimizing compiler, building new passes and techniques that push the performance envelope on the LPU.
  • Extend Groq’s intermediate representation dialects to capture emerging ML constructs, portable graph models (e.g., ONNX), and evolving deep learning frameworks.
  • Architect new compiler passes, develop innovative scheduling techniques, and create front-end language dialects to support evolving ML workloads.
  • Benchmark compiler outputs, diagnose inefficiencies, and drive enhancements to maximize quality-of-results on LPU hardware.
  • Partner with hardware architects and software leads to co-design compiler and system improvements that deliver measurable acceleration gains.
  • Mentor junior engineers, review contributions, and guide large-scale, multi-geo compiler projects to completion.
  • Publish novel compilation techniques and contribute thought leadership to top-tier ML, compiler, and computer architecture conferences.

Requirements

  • 8+ years of experience in computer science/engineering or a related field.
  • 5+ years of direct experience with C/C++ and LLVM or other compiler frameworks.
  • Strong compiler engineering background: IR design, optimization passes, scheduling, and code generation.
  • Experience with MLIR and LLVM is highly desirable.
  • Familiarity with ML frameworks (TensorFlow, PyTorch) and portable graph models (ONNX) desired.
  • Knowledge of spatial architectures such as FPGA or CGRAs is an asset.
  • Knowledge of functional programming languages is an asset.
  • Experience benchmarking compiler outputs and optimizing for hardware performance.
  • Demonstrated ability to collaborate with hardware architects and software teams for co-design efforts.
  • Leadership experience: mentoring, design reviews, and driving large projects to completion.

Additionally Nice To Have

  • Strong initiative and personal drive; able to self-motivate and drive projects to closure.
  • Keen attention to detail and strong written and oral communication skills.
  • Team-first attitude and ability to motivate peers.
  • Optimistic outlook and coaching/mentoring ability.

Compensation

  • Base salary range: 185,500 - 324,600 (determined by location, skills, qualifications, experience, and internal benchmarks).
  • Role also includes equity and benefits. Compensation for candidates outside the USA will be dependent on the local market.

Equal Opportunity & Accessibility

Groq is an Equal Opportunity Employer committed to creating an inclusive environment. All qualified applicants will receive consideration without regard to protected characteristics. Groq complies with applicable laws governing nondiscrimination and provides reasonable accommodations to qualified individuals with disabilities. For accommodation requests, contact [email protected].