EDA Methodology Architect

Details

NVIDIA develops internal EDA tools by combining advances in parallel computing, machine learning, and specialized algorithms for VLSI design.

The team is seeking a Senior P&R Methodology Architect to define and own the next-generation RTL2GDS flow for advanced nodes of 3 nm and below, as well as high-performance GPU, CPU, and SoC designs. The role requires hands-on experience across the full RTL2GDS flow, including RTL, DFT, synthesis, placement, optimization, CTS, routing, and signoff.

Responsibilities

• Work directly with core P&R engine developers to define real-world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior, quality of results (QoR), and scalability.
• Define and roll out next-generation flows, including refactoring legacy flows and consolidating ad hoc solutions into scalable, maintainable frameworks used across multiple design teams.
• Design and run rigorous A/B and multi-variant experiments to compare flows, engines, and tool settings.
• Develop Python-based analytics and apply ML and GenAI techniques to mine large QoR datasets, recommend flow settings, and automate analysis.
• Perform deep root-cause analysis on QoR issues across engines, tools, and flows.
• Drive methodologies to resolve timing-closure issues and performance limiters.
• Partner with architecture, RTL, DFT, synthesis, physical design, power, signoff, and CAD/methodology teams as a key technical leader and bridge.
• Drive aggressive performance, power, and area (PPA) targets and adoption of new tools and flows across the company.

Requirements

• Bachelor's or master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
• At least 8 years of physical design experience.
• Deep expertise with industry-standard tools such as ICC2, Innovus, PrimeTime, and Tempus.
• Extensive hands-on P&R experience taking complex blocks or chips through tape-out while meeting aggressive PPA targets.
• Proven Python, Perl, and Tcl flow-development skills.
• Strong problem-solving skills and self-motivation, including the ability to simplify complex environments and modernize legacy tools and processes.
• Excellent communication and collaboration skills, with experience driving consensus and solving complex issues across distributed design, CAD, and R&D teams.

Preferred Qualifications

• Experience collaborating with EDA or internal R&D teams on core engine development, including co-defining features, developing benchmarks, and leading validation and deployment.
• Expertise in designing and automating A/B tests and large-scale regressions.
• Experience analyzing large QoR datasets to identify trends and drive root-cause analysis.
• Background in advanced-node and large-scale designs, including exposure to DFM, variability, EM/IR, and power-integrity challenges.
• Hands-on experience applying AI, ML, or GenAI to physical design, QoR analysis, or flow development.

Compensation and Benefits

• Expected base salary for Level 4: USD 168,000–264,500 per year.
• Expected base salary for Level 5: USD 196,000–310,500 per year.
• Eligible for equity and benefits.
• Full-time position.
• Applications accepted at least until November 3, 2026.
• NVIDIA is an equal opportunity employer committed to an inclusive work environment.