Used Tools & Technologies
Not specified
Required Skills & Competences
Tag name is followed by "@" symbol and proficiency level value.
About proficiency levels:
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
Algorithms @ 4
Data Structures @ 6
Debugging @ 4
AI @ 4
Profiling @ 4
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
Details
NVIDIA's SoC Memory Subsystem team is looking for a strong, senior DRAM firmware engineer to own memory firmware from architecture through production silicon. You'll lead in areas of DRAM initialization and training across DDR/LPDDR, drive interface tuning across process, voltage, and temperature corners, and set the direction for how we take new memory interfaces from pre-silicon to production.
Responsibilities
- Own DRAM firmware across its lifecycle — architecture, implementation, silicon bring-up, and production tuning.
- Design and implement DRAM initialization and training sequences: training protocols, calibration algorithms, and their firmware implementation.
- Characterize and tune the DRAM interface across PVT (process / voltage / temperature) variation to hold margins across corners.
- Drive the memory bring-up and validation strategy; root-cause complex hardware/software interactions in the lab and in pre-silicon.
- Set firmware quality bar — code review, profiling, and coverage — and mentor early-career engineers on the team.
- Refine interface bring-up and validation strategy.
Requirements
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or related field (or equivalent experience).
- 6+ years of relevant DRAM / memory firmware development for high speed LPDDR or system DDR memories.
- Strong command of DRAM initialization and training — protocols, calibration algorithms, and their implementation in firmware.
- Deep understanding of DRAM interfaces and how PVT (process / voltage / temperature) variation affects timing, training, and margining.
- Proficiency in C/C++, with a solid grasp of data structures, compilers, and build and version-control tooling.
- Excellent debugging skills; able to decompose hard, ambiguous failures from first principles.
Ways to stand out from the crowd
- Breadth across DDR / LPDDR / HBM and multiple DRAM vendors.
- Signal-integrity intuition and comfort working with analog/mixed-signal behavior.
- Understanding of ASIC boot architecture.
Compensation & Additional details
- Base salary ranges (location, experience, and level dependent):
- Level 4: 184,000 USD - 287,500 USD
- Level 5: 224,000 USD - 356,500 USD
- You will also be eligible for equity and benefits.
- #LI-Hybrid
- Applications accepted at least until June 30, 2026.
NVIDIA is committed to fostering an inclusive work environment and is an equal opportunity employer. NVIDIA uses AI tools in its recruiting processes.
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