Tech Stack
Tag name is followed by "@" symbol and proficiency level value.
About proficiency levels:
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
AI @ 4
Agentic AI @ 4
Algorithms
C @ 6
C++ @ 6
Data Structures @ 6
Debugging
LLM
LangChain @ 4
Prompt Engineering @ 4
Reinforcement Learning
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
Details
NVIDIA is seeking an experienced engineer to pioneer the next generation of hardware formal verification tools. The role focuses on research, architecture, and development of core formal verification engines enhanced by agentic AI frameworks. You will create collaborative, autonomous AI agent networks that extend formal tools by breaking down large builds, coordinating solver strategies, synthesizing complex properties, and debugging execution traces at scale.
Responsibilities
- Architect, build, and advance formal verification algorithms, including model checking, SAT/SMT solvers, BDDs, equivalence checking, and theorem proving.
- Design, develop, and deploy multi-agent AI systems using LLMs, reinforcement learning, and graph neural networks to analyze RTL topologies, partition large design spaces, and dynamically tune solver parameters.
- Develop orchestration layers in which autonomous AI agents collaborate to address state-space explosion across multi-billion-gate builds and designs with deep sequential depth.
- Develop intelligent engines for ingesting and abstracting specifications and automatically generating complex SystemVerilog Assertions (SVA) from natural-language specifications and architectural intent.
- Drive features from algorithmic research through implementation in high-performance C/C++ environments and integrate them into commercial EDA tool suites.
Requirements
- Ph.D., master's degree, or equivalent experience in computer science, electrical engineering, computer engineering, or a related quantitative field.
- At least 15 years of professional R&D experience building commercial or advanced academic Electronic Design Automation (EDA) hardware verification tools.
- Deep mathematical and practical understanding of formal methods, including bounded model checking (BMC), unbounded model checking (PDR/IC3), abstract interpretation, and theorem proving.
- Expert-level proficiency in C/C++, including Modern C++17/20, high-performance data structures, memory optimization, and multithreading.
- Experience building or researching agentic AI pipelines, multi-agent frameworks such as LangChain, AutoGen, and CrewAI, tool-use execution, and prompt engineering for structured code or hardware descriptions.
- Experience with RTL languages, including SystemVerilog, VHDL, and Verilog, along with a solid understanding of SystemVerilog Assertions (SVA).
Additional Information
Candidates should demonstrate a strong record of deploying advanced EDA solutions in high-stakes environments and solving complex verification challenges. NVIDIA uses AI tools in its recruiting processes and is committed to an inclusive, equal-opportunity work environment.
Applications for this job will be accepted at least until September 13, 2026. This posting is for an existing vacancy.