Applied Research Engineer, Chip Design

at Nvidia

USD 192,000-356,500 per year

SENIOR

✅ Hybrid

Tech Stack
Tag name is followed by "@" symbol and proficiency level value. About proficiency levels:

1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;

3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;

7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;

10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.

AI @ 4 Agentic AI @ 4 Agentic Systems CI/CD @ 4 Communication @ 4 Docker @ 4 Experimentation @ 4 LLM @ 4 Machine Learning Slurm @ 4

Apply LLMs, coding agents, and agentic systems to core ASIC design problems: RTL generation, Design and Formal verification, PPA prediction and optimization.
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data, model training, coding agents, tool-using agents, and production ML systems.
Deliver against NVIDIA's internal chip design schedules and activities; success is measured by how much faster the ASIC teams move, not by research output alone.
Build robust data generation (including synthetic data) and a meticulous evaluation methodology that separates working systems from demos and uses evaluation to decide what to automate next.
Wire coding agents and agentic AI into EDA and validation flows — simulation, regressions, waveform and log analysis, script generation — so engineers can drive complex tasks and cut ramp time.
Push the limits of what’s possible in chip design with models and research harnesses on top of open-source foundations and iterate fast from prototype to production.
Partner closely with NVIDIA's internal Nemotron team to improve models with domain-specific data, feedback, and post-training, feeding ASIC-design expertise back into the models.

MS or PhD or equivalent experience in Computer Science, Electrical/Computer Engineering, or related field.
8+ years of proven industry experience.
Domain and technical expertise in front-end ASIC (design, verification, timing) combined with project experience applying agentic AI to chip design and optimization problems, with a track record of driving ideas from conception through experimentation to production.
Hands-on experience building LLM-based agents or AI tooling that real users depend on, including context engineering, tool integration, orchestration, and failure analysis, with a focus on evaluation.
Experience with custom model training, fine-tuning, or post-training (SFT, RLHF/DPO) over proprietary technical data.
Excellent self-motivation, creativity, and a passion for applied research, plus tight-knit collaboration skills and the ability to work effectively within a team.
Experience building and maintaining infrastructure (Docker, Slurm, CI/CD, etc.).
Excellent written and verbal communication, with proven experience presenting and explaining complex technical work.