Custom SoC IP Verification Engineer

Details

NVIDIA is seeking a Senior Custom SoC/IP Verification Engineer to verify next-generation SoC and IP solutions. This role focuses on fabric and interconnect verification across both IP and SoC integration, ensuring the correctness, performance, and compliance of on-chip fabrics and interconnect subsystems from IP bring-up through full-chip integration.

Responsibilities

• Perform ASIC design verification of fabric and interconnect IP blocks and full-chip integrations, covering DMA, routing, arbitration, ordering, flow control, and protocol compliance.
• Develop and implement test plans for fabric and interconnect verification using UVM-based environments at both IP and system levels.
• Design and implement constrained-random and directed SystemVerilog testbenches for interconnect fabrics, network-on-chip (NoC) topologies, and multi-agent SoC integrations.
• Collaborate with Architecture, Software/Firmware, Design, Modeling, Emulation, and Post-Silicon Validation teams to develop comprehensive verification plans and execution strategies.
• Drive silicon and platform verification strategies and methodologies for fabric and interconnect subsystems.

Requirements

• Bachelor's or master's degree in Computer Engineering, Electrical Engineering, or a related field, or equivalent experience.
• 8+ years of experience in ASIC verification, with a strong focus on fabric, interconnect, or network-on-chip verification at both IP and full-chip levels.
• Strong knowledge of SystemVerilog and UVM methodology.
• Hands-on experience with industry-standard interconnect and bus protocols, such as AMBA AXI, CHI, or equivalent, including ordering, coherency, and flow-control semantics.
• Familiarity with SoC architectures, NoC topologies, and multi-initiator/multi-target interconnect designs.
• Proficiency in scripting languages such as Python, Perl, and Tcl.

Preferred Qualifications

• Knowledge of performance verification and bandwidth/latency analysis for interconnect fabrics.
• Exposure to verification IPs for bus protocols or emulation platforms such as Palladium and Veloce for full-chip fabric validation.
• Experience with GPU or AI accelerator SoC interconnect verification.
• Experience with formal verification or assertion-based verification using SVA for fabric and protocol properties.

Compensation and Benefits

• Base salary range: $168,000–$264,500 for Level 4.
• Base salary range: $196,000–$310,500 for Level 5.
• Eligible for equity and benefits.
• NVIDIA offers a comprehensive benefits package.

Applications will be accepted at least until September 19, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes and is an equal opportunity employer.