Tech Stack
Tag name is followed by "@" symbol and proficiency level value.
About proficiency levels:
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
AI @ 6
Algorithms @ 3
CUDA @ 3
Deep Learning @ 2
GPU @ 6
LLM
Machine Learning @ 3
Networking
Python @ 6
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
Details
About the Team
OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.
About the Role
As an Engineer on our hardware optimization and co-design team, you will co-design future hardware from different vendors for programmability and performance. You will work with our kernel, compiler and machine learning engineers to understand their unique needs related to ML techniques, algorithms, numerical approximations, programming expressivity, and compiler optimizations. You will evangelize these constraints with various vendors to develop and influence future hardware architectures towards efficient training and inference on our models.
If you are excited about efficiently distributing a large language model across devices, dealing with and optimizing system-wide/rack-wide networking bottlenecks and eventually tailoring the compute pipe and memory hierarchy of the hardware platform, simulating workloads at different abstractions and working closely with our partners, this is the perfect opportunity!
This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees.
Key Responsibilities
- Co-design future hardware for programmability and performance with our hardware vendors
- Assist hardware vendors in developing optimal kernels and add support for it in our compiler
- Develop performance estimates for critical kernels for different hardware configurations and drive decisions on compute core and memory hierarchy features
- Build system performance models at different abstraction levels and carry out analysis to drive decisions on scale up, scale out, front end networking
- Work with machine learning engineers, kernel engineers and compiler developers to understand their vision and needs from high performance accelerators
- Manage communication and coordination with internal and external partners
- Influence the roadmap of hardware partners to optimize them for OpenAI’s workloads
- Evaluate potential partners’ accelerators and platforms
- As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings
Requirements
- 4+ years of industry experience, including experience harnessing compute at scale and optimizing ML platform code to run efficiently on target hardware
- Strong experience in software/hardware co-design
- Deep understanding of GPU and/or other AI accelerators
- Experience with CUDA, Triton or a related accelerator programming language
- Experience driving Machine Learning accuracy with low precision formats
- Experience with system performance modeling and analysis to optimize ML model deployment
- Strong coding skills in C/C++ and Python
- Are familiar with the fundamentals of deep learning computing and chip architecture/microarchitecture
- Able to actively collaborate with ML engineers, kernel writers, compiler developers, system engineers, chip architects/microarchitects
Preferred Skills
- PhD in Computer Science and Engineering with a specialization in Computer Architecture, Parallel Computing. Compilers or other Systems
- Strong understanding of LLMs and challenges related to their training and inference
Benefits
- Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
- Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
- 401(k) retirement plan with employer match
- Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)
- Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
- 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)
- Mental health and wellness support
- Employer-paid basic life and disability coverage
- Annual learning and development stipend to fuel your professional growth
- Daily meals in our offices, and meal delivery credits as eligible
- Relocation support for eligible employees
- Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.
More details about our benefits are available to candidates during the hiring process.