Hardware Tools Engineer

Details

OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for advanced AI workloads. The team co-designs chips, systems, tools, and methodologies for OpenAI’s supercomputing platform.

You will develop and evolve the tooling ecosystem used by hardware engineers, covering hardware compilers, IR transformations, simulation, debugging, and automation infrastructure. The role combines software engineering, compiler concepts, and practical hardware workflows, working closely with architects, RTL designers, and verification engineers.

Responsibilities

• Build and improve software tooling for compilation, IR transformations, RTL generation, simulation, debugging, and automation.
• Extend and integrate hardware compiler stacks, including frontends, IR passes, lowering, scheduling, and code generation to Verilog/SystemVerilog.
• Improve developer experience and reliability through reproducible builds, better error messages, faster iteration loops, and dependable CI and regression infrastructure.
• Collaborate with designers and verification engineers to turn engineering pain points into durable tools.
• Read and reason about Verilog/SystemVerilog to debug issues, validate tool output, and improve debuggability.
• Investigate gate-level views, synthesis results, and implementation artifacts when necessary.
• Enable PPA optimization loops by building analysis and automation for area, timing, and power tradeoffs.

Requirements

• Demonstrated ability to build and maintain software through projects, internships, research, open-source work, or equivalent experience.
• Strong computer science fundamentals, including data structures, algorithms, debugging, and software design.
• Proficiency in at least one of Rust, C++, or Python, with willingness to learn the others.
• Familiarity with digital design concepts and the ability to read RTL, including Verilog/SystemVerilog, or equivalent hardware descriptions.
• Familiarity with compiler or IR-based concepts such as representations, passes, transformations, and lowering through coursework or projects.
• Comfort operating in ambiguity and iterating quickly with tool users.

Nice-to-Have Skills

• Exposure to compiler and hardware toolchains such as XLS/DSLX, LLVM, Chisel/FIRRTL, CIRCT/MLIR, HardCaml, SpinalHDL, Spade, PyMTL, Clash, BlueSpec, or PyRope.
• Experience with Verilog tooling ecosystems such as Yosys/RTLIL, Verilator, or Slang.
• Experience with build and test infrastructure, including Bazel, CI systems, fuzzing, and performance testing.
• Experience with synthesis, place and route, static timing analysis, or other PPA-related workflows.

Additional Information

Candidates may need to meet certain legal status requirements under U.S. export control laws and regulations.

OpenAI is an equal opportunity employer and provides reasonable accommodations to applicants with disabilities. Background checks are administered in accordance with applicable law.

Benefits

• Base salary range of $225,000–$445,000, plus equity.
• Medical, dental, and vision insurance, with employer contributions to Health Savings Accounts.
• Pre-tax accounts for health, dependent care, and commuter expenses.
• 401(k) retirement plan with employer match.
• Paid parental, medical, and caregiver leave.
• Paid time off, paid company holidays, office closures, and sick or safe time.
• Mental health and wellness support.
• Employer-paid basic life and disability coverage.
• Annual learning and development stipend.
• Daily office meals and eligible meal delivery credits.
• Relocation support for eligible employees.
• Additional benefits may include charitable donation matching and wellness stipends.