Senior Firmware Engineer - Development, Verification and Infrastructure
Tech Stack
Tag name is followed by "@" symbol and proficiency level value.
About proficiency levels:
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
Communication @ 4
Debugging @ 7
GPU
HPC
NVLink
Networking @ 1
Python @ 6
Software Development @ 1
- 1-2 — basic awareness. Minimal hands-on experience, and a rudimentary understanding of the technology's purpose;
- 3-6 — daily use. Comfortable and regular usage, capable of handling common tasks and challenges related to the technology;
- 7-9 — you are an expert, you can teach others, you know all the pitfalls and tricks;
- 10 — exceptional knowledge, comprehensive understanding, and adeptness in all aspects of the technology, including advanced problem-solving. Think twice before claiming or demanding such level.
Details
As a member of the NVLink Firmware Development and Verification team, you will perform unit- and integration-level firmware verification across pre-silicon and post-silicon platforms. You will also help enable firmware and verification infrastructure for next-generation GPUs that power high-performance interconnects in multi-GPU systems. Experience or familiarity with high-performance computing systems, interconnects, networking protocols, and networking architectures is a plus.
Responsibilities
- Collaborate within a combined design and verification team to validate firmware features and functionality.
- Develop verification plans, test cases, and correctness models, primarily in Python, to verify firmware functionality.
- Drive silicon bring-up, feature enablement, and debugging activities on GPU systems.
- Work closely with architecture, hardware, and firmware teams on firmware enablement, design-for-debug, and validation strategies.
- Triage and resolve firmware issues observed during customer qualification or in-field testing.
- Log and track bugs, maintain coverage metrics, and perform gap analysis.
- Develop and maintain automation tools and infrastructure to improve firmware development, regression, and verification workflows.
Requirements
- Bachelor's or master's degree, or equivalent experience, in Electrical Engineering, Computer Science, or a related field.
- At least 6 years of experience in firmware or software verification.
- Strong debugging and analytical skills.
- Proficiency in Python, C, and C++, with an understanding of object-oriented programming.
- Solid understanding of computer architecture, microprocessors, and microcontroller fundamentals.
- Excellent collaboration and communication skills, including experience working across on-site and remote teams.
- Positive attitude and strong team-player skills, with the ability to work effectively under tight schedules.
- Software development or verification experience is a plus.
Preferred Qualifications
- Passion for low-level software, firmware development, and debugging.
- Hands-on experience with hardware/software interaction and embedded environments.
- Familiarity with RTOS or RISC-V programming and debugging.
- Ability to work independently with minimal supervision.
- Strong execution discipline and ability to meet schedule commitments.
Compensation And Benefits
The base salary range is USD 184,000–287,500 for Level 4 and USD 224,000–356,500 for Level 5. Salary is determined based on location, experience, and the pay of employees in similar positions. The role is also eligible for equity and benefits.
NVIDIA is committed to fostering an inclusive work environment and is an equal opportunity employer. Applications will be accepted at least until August 3, 2026.